कम्प्युटर / सूचना प्रविधि कम्प्युटर अपरेटर (पाँचौँ तह) र सहायक – प्राविधिक पत्र
कम्प्युटर / सूचना प्रविधि – कम्प्युटर अपरेटर (पाँचौँ तह) र सहायक
Computer Operator & Assistant · Computer & IT Posts
२,५७७ प्रश्न उपलब्ध। मोड छान्नुहोस्:
प्राविधिक पत्र: प्रश्न र उत्तर
सही लागेको विकल्पमा थिच्नुहोस्। सही भए हरियो, गलत भए रातो देखिन्छ; ५ सेकेन्डपछि सही उत्तर र व्याख्या देखिन्छ।
सही: ० / ०
-
When the CPU repeatedly checks each I/O device to see whether it needs service, the technique is called:
सही उत्तर: ख) polling
In polling (programmed I/O) the CPU tests status flags itself, wasting time compared with interrupts.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
A structural hazard in a pipeline occurs when:
सही उत्तर: क) two instructions need the same hardware resource in the same clock cycle
For example, a single memory port needed by both an instruction fetch and a data access causes a structural hazard.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
In a pipelined processor, a data hazard occurs when:
सही उत्तर: क) an instruction needs the result of an earlier instruction that is still in the pipeline
For example, ADD R1,R2,R3 followed by SUB R4,R1,R5 needs R1 before the ADD has written it back.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
A processor runs at 2 GHz with an average of 4 clock cycles per instruction. Its speed in MIPS is:
सही उत्तर: ख) 500
MIPS = clock rate / (CPI x 10^6) = 2000 MHz / 4 = 500 MIPS.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
An instruction like CMA (complement the accumulator) in the 8085, whose operand is specified by the opcode itself, uses which addressing mode?
सही उत्तर: क) Implied (implicit) addressing
In implied addressing the operand (here the accumulator) is understood from the opcode, so no operand field is needed.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
In indexed addressing mode, the effective address of the operand is:
सही उत्तर: ख) the address field plus the contents of an index register
Indexed addressing adds the index register to a base address in the instruction, useful for accessing array elements.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
In relative (PC-relative) addressing mode, the effective address is obtained by:
सही उत्तर: घ) adding the address field (offset) to the program counter
Effective address = PC + offset; this is common for branch instructions and position-independent code.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
Zero-address instructions, such as ADD with no operand fields, are used in:
सही उत्तर: घ) stack-organised computers
In a stack machine the operands are taken implicitly from the top of the stack, so no address field is needed.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
The ARM processors used in most smartphones follow which design approach?
सही उत्तर: ग) RISC
ARM (originally Acorn RISC Machine) uses a reduced instruction set with simple, fixed-length instructions.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
-
Which of the following processor families is an example of CISC architecture?
सही उत्तर: ग) Intel x86
x86 has many complex, variable-length instructions; ARM, RISC-V and MIPS are RISC designs.
💬 टिप्पणी / गल्ती रिपोर्ट (०)
यी अभ्यास प्रश्न हुन्, आधिकारिक प्रश्न होइनन्। पाठ्यक्रम, विज्ञापन र नतिजाका लागि सम्बन्धित निकायको आधिकारिक वेबसाइट हेर्नुहोस्। उत्तरमा गल्ती भेटे प्रश्नमुनिको "टिप्पणी / गल्ती रिपोर्ट" मा लेख्नुहोस्।
नमस्ते! पाठ्यक्रम, सामान्य ज्ञान, भाषा परीक्षा वा कुनै प्रश्नको उत्तर बुझ्न सोध्नुहोस्।
AI ले गल्ती गर्न सक्छ। महत्वपूर्ण कुरा आधिकारिक स्रोतमा जाँच्नुहोस्।